The resizer is used in imaging devices, for example, portable media devices or digital cameras, for changing the image resolution between a source and a destination. The resizer can be used to either up-scale the image thereby allowing the user to achieve digital zoom or down-scale the image for effectively displaying a large format image on a much smaller resolution LCD panel or for achieving a smaller resolution image for further processing. Digital image includes a two dimensional array of pixels. A horizontal array of pixels is referred to as a line. The output interface of the resizer can support a maximum data rate of for example, 200 Megapixels (Mpix)/cycle. While this easily translates to an input data rate of 200 Mpix/cycle while down-sealing, the maximum input rate is reduced during up-scaling as each input pixel/line leads to multiple output pixels/lines. Thus, the input data rate during up-scale is variable and depends on the up-scale ratio of the horizontal and vertical direction. The equation given below defines the maximum input rate that can be achieved during up-sampling:Input clock<=200 Mhz/[(Horizontal up-scale ratio*Vertical up-scale ratio)]  Equation 1
Thus for example, if the horizontal and vertical up-scale ratios are fixed to 2×, then the maximum rate that can be achieved on the input is 200/(2*2)=50 Mhz. The equation 1 derives from the fact that, during 2× up-scale, each input pixel will result in 2 output pixels in the horizontal direction, and each input line will result in 2 output lines in the vertical direction. Thus if the output rate is clipped at 200 Mpix/cycle, only 50 Mpix/cycle can be supported at the input side if the overall up-scaling ratio is 4×.
Although, functionally any input clock (as defined by the above equation) will suffice, it's always necessary to maximize the input clock to have the best performance. Lower data rate also means that it will require more time to generate the output image and hence performance is downgraded. The target is to be able to achieve a data rate of 200 MPix/cycle even though digital zoom with fractional values is used.
Further, the performance constraints are easily met when there is up-scale only in the horizontal direction or up-scale in the vertical direction (along with horizontal) with the vertical up-scale ratio being an integer. However, certain complexities may arise when the vertical up-scale ratio is a fraction and the impact this can have on the performance of the resizer. For example, consider a case when the horizontal rescale ratio is ‘1×’ and the vertical rescale ratio is ‘1.1×’. In this case the resizer cannot generate 1.1 lines for every incoming line, instead for every 10 input lines, 11 output lines are generated. The resizer generates 1 output line per incoming line, till the difference in floor function of the new and old vertical ratio becomes equal to 2. Once this condition is met, the resizer generates 2 output lines corresponding to that input line. In the subsequent lines, resizer again generates 1 output line per input line and the pattern repeats.
A direct consequence of this irregular output pattern is the fact that the input pixel clock now needs to run much slower than the 181 Mhz (200/1.1) as governed by equation 1. The reason being that the output port of the resizer can at most produce data at the rate of 200 Mpix/cycle. For the case when the resizer is outputting 2 lines for the corresponding input line, the maximum input rate that can be sustained is only 100 Mpix/cycle. Since the input rate corresponds to the speed at which data is being read from the sensor, it has to stay constant throughout the frame. As such, even in the cases when the resizer is generating only one output line/input line, the input data rate will be 100 Mpix/cycle. Thus in this case the desired input rate is 81% faster than the actual rate.